Latest news with #GDS
Time of India
4 hours ago
- Politics
- Time of India
Nagaland MP urges Rio to recognise tribal dialects as ‘third language'
1 2 Dimapur: Lok Sabha MP from Nagaland S Supongmeren Jamir on Sunday urged CM Neiphiu Rio to recognise the tribal languages spoken in the state as the 'third language', as it will help in creation of employment opportunities for the youth. In a letter to Rio, Jamir drew his attention to the issue of engagement of non-local Gramin Dak Sevaks (GDS) in post offices of the northeast, including Nagaland, stating that recruitment for Grade IV staff in the postal department was online-based and required Class X pass certificate and marksheet. Based on the local language/dialect prescribed for Nagaland by the postal department, vide their notification No.17-02/2025-GDS (Annexure I), the candidates are shortlisted on the basis of their marks obtained in English/Hindi in Class X, Jamir said, adding that it undermined the third dialect/language candidates would have otherwise studied or are fluent in. This impacts the performance of the local candidates when they compete nationwide, he added. Jamir said in the past two years, there have been three rounds of recruitment for 364 posts, including a special drive in Jan 2023 where 143 posts had been advertised for Nagaland. He said the DG of GDS had written to the chief postmasters general, northeast circle, stating that English, as an official language, was recognised in Nagaland and agreed in principle that the northeast circle post office will engage with the state govt to officially identify the local dialects/languages that can be considered as a medium of evaluation during recruitment. Accordingly, this had been communicated by the director of postal services, Nagaland, to the home commissioner on April 16, 2025. However, the state govt is yet to officially recognise the dialects/languages of the recognised tribes in the state for the purpose of a 'third language/dialect', he said. In this regard, the state home department had written to the commissioner & secretary, art & culture, to submit their views and comments, Jamir added.
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Business Standard
6 days ago
- General
- Business Standard
India Post 4th merit list 2025 released for GDS recruitment; details here
India Post 4th merit list 2025: India Post has released the fourth merit list for the Gramin Dak Sevak (GDS) Recruitment 2025. Candidates who have been waiting for the results can now check their names on the official website – The list includes candidates selected for various GDS positions such as Branch Postmaster (BPM), Assistant Branch Postmaster (ABPM), and Dak Sevak across different states. India Post GDS 4th merit List: Selection process Recruitment is based solely on marks obtained in Class 10. There is no written examination involved. How to check the India Post GDS 4th merit list? Here's how to check the India Post GDS 4th merit list: Visit the official website, Go to the candidate's corner and click on GDS Online Engagement. Under your respective postal circle, locate Supplementary List-IV. Download the PDF and search for your result using your registration number. The merit list includes the names, registration numbers, percentage marks, and allotted divisions of shortlisted candidates India Post GDS 4th merit list: Document verification Candidates whose names appear in the merit list are required to undergo document verification. They should wait for an official communication, either by phone or written notice, from the concerned Divisional Head or Post Office, which will provide details about the verification schedule and venue. Physical presence is mandatory at the designated location on the specified date with all required documents. What are the documents required for verification? Here are the list of documents required for verification: Original and photocopy of Class 10 mark sheet and certificate Proof of date of birth Valid caste/category certificate (if applicable) Computer training certificate Government-issued photo ID (Aadhaar, Voter ID, etc.) Two passport-size photographs Two self-attested copies of each document listed above Failure to provide any of the required documents may result in the cancellation of the provisional selection.
NDTV
6 days ago
- General
- NDTV
India Post Releases 4th Merit List For GDS Recruitment 2025, Check What's Next
India Post GDS Recruitment 2025: India Post has released the fourth merit list for the Gramin Dak Sevak (GDS) recruitment 2025. Candidates awaiting their results can check their names in the merit list by visiting the official website - The merit list includes the names of candidates selected for various GDS posts such as Branch Postmaster (BPM), Assistant Branch Postmaster (ABPM), and Dak Sevak across different states. Selection is based on the marks secured in Class 10; no written examination is conducted as part of the recruitment process. Candidates Selected In Merit List to Undergo Document Verification Those whose names appear in the merit list must undergo the document verification process. How To Access India Post GDS 4th Merit List: Candidates can check the state-wise fourth merit list for GDS posts by following these steps: Visit Navigate to the Candidate's Corner and click on GDS Online Engagement. Under your respective postal circle, find Supplementary List-IV. Download the PDF and search for your result using your registration number. Each merit list PDF includes the names of shortlisted candidates, their registration numbers, percentage marks, and allotted divisions. What Happens After Selection? Instructions for Candidates in the Fourth Merit List Candidates whose names are listed in the fourth merit list should wait for official communication-either a phone call or a written notice-from the concerned Divisional Head or Post Office. This will include details about the document verification schedule and venue. Mandatory Physical Presence for Verification Candidates must be physically present at the assigned location on the specified date with all required documents. Documents Required For Verification Original Class 10 mark sheet and certificate Proof of date of birth Valid caste/category certificate (if applicable) Certificate of computer training completion Valid government-issued photo ID (e.g., Aadhaar or Voter ID) Two passport-size photographs Two self-attested photocopies of each of the above documents Failure to produce any of the above documents may result in cancellation of the provisional selection.
Time of India
6 days ago
- General
- Time of India
India Post GDS 4th merit list 2025 released at indiapostgdsonline.gov.in: Check direct link to download state-wise PDFs here
State-wise India Post GDS 4th merit list has been released at India Post has released the 4th Merit List for GDS Recruitment 2025 on its official website – This list includes the names of candidates selected for various Gramin Dak Sevak (GDS) posts like Branch Postmaster (BPM), Assistant Branch Postmaster (ABPM), and Dak Sevak across different states. Selection is based on marks obtained in Class 10, with no written exam involved. Candidates who find their names in the 4th list will now have to appear for the document verification process. The merit list PDFs are available in a state-wise format for easy access. How to access India Post GDS 4th merit list? Candidates can download the state wise 4th merit list for GDS posts by following the steps below: Visit Navigate to 'Candidate's Corner' and click on 'GDS Online Engagement' Locate Supplementary List‑IV under your postal circle Download the PDF and search using your registration number The direct link to download the merit list is provided below: Direct link to download India Post GDS 4th merit list 2025 Each PDF includes the names of shortlisted candidates, their registration numbers, percentage marks, and allotted division. What happens after selection? Candidates whose names appear in the 4th merit list must: Wait for a call or notice from their Divisional Head/Post Office, which will inform them about the document verification schedule. Appear in person at the designated location with all the required documents. Documents required for verification Shortlisted candidates need to carry the following: Original Class 10 mark sheet and certificate Proof of Date of Birth Caste or Category Certificate (if applicable) Computer Training Certificate Photo ID proof (Aadhaar, Voter ID, etc.) Two sets of self-attested photocopies of all the above documents Passport-sized photographs Failure to produce the required documents may lead to cancellation of the provisional selection. It is advisable to frequently check your email, SMS, and the official website for updates. Is your child ready for the careers of tomorrow? Enroll now and take advantage of our early bird offer! Spaces are limited.
Business Wire
7 days ago
- Business
- Business Wire
Cadence Accelerates SoC, 3D-IC and Chiplet Design for AI Data Centers, Automotive and Connectivity in Collaboration with Samsung Foundry
SAN JOSE, Calif.--(BUSINESS WIRE)--Cadence (Nasdaq: CDNS) today announced an expansion of its collaboration with Samsung Foundry, including a new multi-year IP agreement to broaden Cadence ® memory and interface IP solutions in Samsung Foundry's SF4X, SF5A and SF2P advanced process nodes. Furthering their ongoing technology collaboration, the companies are leveraging Cadence's AI-driven design solutions and Samsung's advanced SF4X, SF4U and SF2P process nodes to deliver high-performance, low-power solutions for AI data center, automotive—including advanced driver-assistance systems (ADAS)—and next-generation RF connectivity applications. Cadence's AI-driven design solutions and comprehensive portfolio of IP and silicon solutions enhance designers' productivity and accelerate time to market (TTM) for leading-edge SoCs, chiplets and 3D-ICs on advanced Samsung Foundry processes. Share Cadence's AI-driven design solutions and comprehensive portfolio of IP and silicon solutions enhance designers' productivity and accelerate time to market (TTM) for leading-edge SoCs, chiplets and 3D-ICs on advanced Samsung Foundry processes. 'We support a full portfolio of IP, subsystems and chiplets on the Samsung Foundry process nodes, and our latest multi-year IP agreement strengthens our ongoing collaboration,' said Boyd Phelps, senior vice president and general manager of the Silicon Solutions Group at Cadence. 'By combining Cadence's AI-driven design and silicon solutions with Samsung's advanced processes, we're delivering the leading-edge technologies our mutual customers need to innovate and bring their products to market faster.' Hyung-Ock Kim, vice president and head of the Foundry Design Technology Team at Samsung Electronics, added, 'Cadence's suite of digital tools from RTL to GDS is now certified for Samsung's latest SF2P process node, supporting advancements like Hyper Cell and LLE 2.0 technologies. Cadence and Samsung are also collaborating closely to enable analog migration, enhance power integrity and improve thermal and warpage analyses for 3D-ICs using GPU acceleration. Additionally, a multi-year agreement between Cadence and Samsung Foundry to expand memory and interface IP solutions further strengthens our partnership.' Expanded IP Agreement Cadence and Samsung Foundry signed a new multi-year agreement to deliver advanced memory and interface IP solutions targeting AI, high-performance computing (HPC) and automotive applications. The expanded SF4X IP portfolio includes LPDDR6/5x-14.4G, GDDR7-36G, DDR5-9600, PCI Express ® (PCIe ®) 6.0/5.0/CXL 3.2, Universal Chiplet Interconnect Express ™ (UCIe ™)-SP 32G and 10G multi-protocol PHY (USB3.x, DP-TX, PCIe 3.0 and SGMII) with companion controller IP, enabling a complete subsystem silicon solution. LPDDR5X-8533 PHY IP tailored for automotive applications rounds out the SF5A IP platform solution, and the addition of a new 32G PCIe 5.0 PHY to the existing SF2P offering serves leading AI/HPC customers' needs. Digital Full Flow Certification and Advanced Digital Technology Developments Based on an extensive design and technology co-optimization (DTCO) project, the Cadence digital full flow has been certified for the latest Samsung SF2P process node, including the Samsung Hyper Cell methodology. In addition, Cadence implemented support for Samsung Local Layout Effect (LLE) timing accuracy. Cadence and Samsung are also collaborating on DTCO for next-generation process nodes. The Cadence Pegasus ™ Verification System is certified for Samsung SF2P and additional Samsung nodes. The Cadence physical verification flow is optimized to allow mutual customers to achieve signoff accuracy and runtime goals using massive scalability, enabling faster TTM. Analog Design Migration Cadence and Samsung Foundry have successfully automated the migration of analog cell-based 4nm IP to the advanced 2nm process node, enabling faster turnaround time while maintaining functional and design intent. This migration highlights the importance of technology scaling and IP reuse to save time and development costs and sets the stage for future migrations of analog cells and other IP across various process nodes. RF Chip/Package Co-Design Reference Flow Collaboration Cadence and Samsung Foundry also successfully demonstrated a comprehensive Front-End Module (FEM)/Antenna-in-Package (AiP) co-design flow for next-generation mmWave applications based on Samsung's 14nm FinFET process. Design turnaround time was accelerated by streamlining design data management between each stage of IC/module development from initial system-level budgeting through RFIC/package co-design, analysis and post-layout verification. Power Integrity for 3D-IC Cadence and Samsung collaborated on comprehensive full-flow power integrity analysis for 3D-ICs spanning the entire process, from early exploration to final signoff, and employing advanced Cadence EDA tools, including Voltus ™ InsightAI, the Innovus ™ Implementation System and the Integrity ™ 3D-IC Platform. Applied to a high-speed CPU chip using Samsung's SF2 node, Voltus InsightAI achieved an impressive 80-90% resolution of IR-drop violations with minimal timing and power impact, showcasing its ability to balance power integrity with performance needs. About Cadence Cadence is a market leader in AI and digital twins, pioneering the application of computational software to accelerate innovation in the engineering design of silicon to systems. Our design solutions, based on Cadence's Intelligent System Design ™ strategy, are essential for the world's leading semiconductor and systems companies to build their next-generation products from chips to full electromechanical systems that serve a wide range of markets, including hyperscale computing, mobile communications, automotive, aerospace, industrial, life sciences and robotics. In 2024, Cadence was recognized by the Wall Street Journal as one of the world's top 100 best-managed companies. Cadence solutions offer limitless opportunities—learn more at © 2025 Cadence Design Systems, Inc. All rights reserved worldwide. Cadence, the Cadence logo and the other Cadence marks found at are trademarks or registered trademarks of Cadence Design Systems, Inc. PCI Express and PCIe are registered trademarks of PCI-SIG. Universal Chiplet Interconnect Express and UCIe are trademarks of the UCIe Consortium. All other trademarks are the property of their respective owners. Category: Featured
