How China's new hybrid AI chip could rewrite the rules of global computing

In a global first, China has begun the large-scale application of non-binary AI chips, deploying them across sectors as critical as aviation, intelligent displays, and industrial control systems. The breakthrough comes from Professor Li Hongge's team at Beihang University in Beijing and is based on a novel computing approach called Hybrid Stochastic Number (HSN) computing, according to a report by the South China Morning Post.
The new chip merges conventional binary logic with stochastic, or probabilistic, logic to offer an alternative method for data processing. Importantly, the chip avoids reliance on US-restricted components.
What problem is China trying to solve with hybrid computing?
The report outlines two major limitations of conventional chips: the power wall and the architecture wall.
- The power wall stems from binary logic's high energy demands. While binary systems—built on 1s and 0s—offer high accuracy, they consume large amounts of power, making it hard to scale.
- The architecture wall refers to how alternative or non-silicon chips often cannot integrate well with the existing CMOS (complementary metal-oxide-semiconductor) infrastructure, which underpins most global computing today.
Hybrid computing, says Li's team, provides a way around both.
What is hybrid stochastic computing, and how does it work?
Binary systems rely on precise calculations, demanding heavy hardware resources. Probabilistic or stochastic computing, on the other hand, represents values through voltage signal frequencies, thus consuming less power but often introducing delays and imprecision.
By merging these two, Li's team created the Hybrid Stochastic Number system, combining:
> Binary numbers (accurate but power-hungry)
> Stochastic numbers (power-efficient but slower)
> A hybrid form that achieves low energy use with high computational reliability
The result, according to the team, is a chip that is more fault-tolerant, energy-efficient and resistant to signal noise.
Where is this technology being used?
According to the report, the chip has already been implemented in various real-world systems. In touch display systems, it improves user interaction by filtering out noise and detecting weak signals more accurately. In medical or industrial displays, it enables fast, low-power data processing for accurate readings.
It is also being used in flight control systems, where it delivers steady navigation and strong fault tolerance—crucial for aerospace and defence operations.
These systems benefit from the chip's in-memory computing capability, which cuts down energy-hungry data transfer between memory and processors, a major bottleneck in traditional systems.
How was the chip built despite US tech restrictions?
Despite the global race for cutting-edge chips being dominated by advanced nodes like 5nm or 3nm, Li's team used 110nm and 28nm manufacturing processes provided by Semiconductor Manufacturing International Corporation (SMIC), China's leading chipmaker.
This is significant. By relying on mature, domestically available technologies, the team effectively sidesteps US export restrictions on high-end semiconductors while still pushing the envelope on performance through architectural innovation, not brute force hardware.
What's next for this chip technology?
The team is now developing a custom instruction set architecture (ISA) and microarchitecture tailored for hybrid probabilistic computing, the report said. This will enable the chip to support more advanced applications, including AI model acceleration, speech and image recognition, and neural networks.
In essence, this could give China a home-grown pathway to support the future of large-scale AI and machine learning, independent of foreign technologies.
As the US-China tech rivalry deepens, Beijing is pursuing self-reliance in semiconductors and this chip could be a template for how to innovate around restrictions. Instead of trying to match the US in advanced lithography, China is redefining computing logic itself.
If successful, this approach could reshape global thinking about how chips are built, moving from raw transistor counts to new ways of doing math on silicon.

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